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Volumn , Issue , 1999, Pages 223-230
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Interconnect parasitic extraction in the digital IC design methodology
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER SIMULATION;
ELECTRIC NETWORK SYNTHESIS;
ELECTROMIGRATION;
INTEGRATED CIRCUIT LAYOUT;
INTEGRATED CIRCUIT TESTING;
POWER SUPPLY CIRCUITS;
SEMICONDUCTOR DEVICES;
DIGITAL INTEGRATED CIRCUIT DESIGN METHODOLOGY;
INTERCONNECT PARASITIC EXTRACTION;
INTERCONNECTION NETWORKS;
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EID: 0033308393
PISSN: 10923152
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (20)
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References (40)
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