Superscalar RISC processor with 160 FPRs for large scale scientific processing

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1999, Pages 279-280

  Shimada, Kentaro ^a   Kawashimo, Tatsuya ^a   Hanawa, Makoto ^a   Yamagata, Ryo ^a   Kamada, Eiki ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIGITAL ARITHMETIC; REDUCED INSTRUCTION SET COMPUTING; RESPONSE TIME (COMPUTER SYSTEMS); SHIFT REGISTERS; STORAGE ALLOCATION (COMPUTER);

FLOATING-POINT REGISTERS (FPR); SLIDE-WINDOWED REGISTERS METHOD; SUPERSCALAR PROCESSORS;

VLSI CIRCUITS;

EID: 0033299228     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (1)