Simulation of direct tunneling through stacked gate dielectrics by a fully integrated 1D-Schrodinger-Poisson solver

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn , Issue , 1999, Pages 243-246

  Wettstein, A ^a   Schenk, A ^a   Fichtner, W ^a  

^a ETH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIELECTRIC MATERIALS; ELECTRIC CURRENTS; ELECTRON TRANSPORT PROPERTIES; ELECTRON TUNNELING; ELECTROSTATICS; GATES (TRANSISTOR); INTEGRATION; PARTIAL DIFFERENTIAL EQUATIONS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS;

INTEGRATED SCHRODINGER-POISSON SOLVER; STACKED GATE DIELECTRICS;

SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0033284179     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)