1.0ns access 770MHz 36Kb SRAM macro

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1999, Pages 109-110

  Uetake, T ^a   Maki, Y ^a   Nakadai, T ^a   Yoshida, K ^a   Susuki, M ^a   Nanjo, R ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; MOSFET DEVICES; NAND CIRCUITS; PROGRAM COMPILERS;

BITLINE LOAD CIRCUITS; BITLINES; DATA BUS LINE; LATCH TYPE SENSE AMPLIFIER; MEMORY CELL; SENSE AMPLIFIER CIRCUITS; WORD DRIVER CIRCUITS;

RANDOM ACCESS STORAGE;

EID: 0033281352     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)