Compact distributed RLC models for multilevel interconnect networks

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1999, Pages 167-168

  Davis, Jeff A ^a   Meindl, James D ^a  

^a Microelectronics Research Center   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY CONDITIONS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CROSSTALK; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; ELECTROMAGNETIC WAVE PROPAGATION; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; MATRIX ALGEBRA; PARTIAL DIFFERENTIAL EQUATIONS;

CROSSTALK VOLTAGE; INTERCONNECT TIME DELAY; MULTILEVEL INTERCONNECT NETWORKS; QUASI TEM WAVE ANALYSIS; TRANSIENT RESPONSE;

TRANSMISSION LINE THEORY;

EID: 0033281306     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)