High-level synthesis of recoverable VLSI microarchitectures

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 7, Issue 4, 1999, Pages 401-410

  Blough, Douglas M ^a,b   Kurdahi, Fadi J ^c   Ohm, Seong Yong ^d  

^a IEEE   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

^d Seoul Women University   (South Korea)

Author keywords

High level synthesis; Micro rollback; Optimization; Recovery; Scheduling

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK SYNTHESIS;

HIGH LEVEL SYNTHESIS; RECOVERABLE MICROARCHITECTURES;

VLSI CIRCUITS;

EID: 0033280759     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.805747     Document Type: Article

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