0.22 μm CMOS-SOI technology with a Cu BEOL

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1999, Pages 15-16

  Ajmera, A ^a   Sleight, J W ^a   Assaderaghi, F ^a   Bolam, R ^a   Bryant, A ^a   Coffey, M ^a   Hovel, H ^a   Lasky, J ^a   Leobandung, E ^a   Rausch, W ^a   Sadana, D ^a   Schepis, D ^a   Wagner, L F ^a   Wu, K ^a   Davari, B ^a   et al , ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LITHOGRAPHY; METALLIZING; REDUCED INSTRUCTION SET COMPUTING;

CIRCUIT ELEMENTS; GATE LITHOGRAPHY;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0033280708     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)