Low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1999, Pages 11-12

  Xanthopoulos, Thucydides ^a   Chandrakasan, Anantha ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; CORRELATION THEORY; COSINE TRANSFORMS; DIGITAL ARITHMETIC; IMAGE COMPRESSION; PARALLEL PROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; SIGNAL TO NOISE RATIO;

DISCRETE COSINE TRANSFORM; IMAGE PIXELS; VOLTAGE SCALING TECHNIQUES;

MICROPROCESSOR CHIPS;

EID: 0033280356     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (1)