Low-temperature metal/ON/HSG-cylinder capacitor process for high density embedded DRAMs

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1999, Pages 157-158

  Yamamoto, I ^a   Honma, I ^a   Yamamoto, T ^a   Urabe, K ^a   Inoue, K ^a   Takaishi, Y ^a   Yamada, Y ^a   Tokunaga, K ^a   Kubota, R ^a   Hamada, M ^a   Kato, Y ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CAPACITORS; CELLULAR ARRAYS; ELECTRODES; GRAIN SIZE AND SHAPE; LOGIC DEVICES; LOW TEMPERATURE OPERATIONS; PHOSPHORUS; SEMICONDUCTOR DOPING; VLSI CIRCUITS;

HEMISPHERICAL GRAIN; LOW TEMPERATURE CYLINDER CAPACITOR PROCESS;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0033280129     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (1)