An end EC for high rate quadbit mod 2 codes

IEEE Transactions on Magnetics

Volumn 35, Issue 5 PART 1, 1999, Pages 2298-2300

  Livingston, J N ^a   Bliss, William G ^a  

^a Cirrus Logic Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL CAPACITY; CONSTRAINT THEORY; ERROR ANALYSIS; SIGNAL ENCODING;

BLOCK SIZE CODEWORDS; SHANNON CAPACITY;

MAGNETIC STORAGE;

EID: 0033184164     PISSN: 00189464     EISSN: None     Source Type: Journal    
DOI: 10.1109/20.800805     Document Type: Article

References (4)

1. H. Sawaguchi, et al., "Concatenated Error Correction Coding for High-Order PRML Channels," Conference Record, IEEE 1998 Globecom, paper S118.1, November, 1998, Sydney, Australia.
2. Bliss, W. G. , "An 8/9 Rate Time-Varying Trellis Code for High Density Magnetic Recording," IEEE Trans. Mag., Sept., 1997.
3. J. Moon and B. Brickner, "Maximal transition run codes for data storage systems," IEEE Trans. on Magnetics, pp. 3992-3994, Sept., 1996.
4. E. Soljanin, "Decoding Techniques for some Specially Constructed DC-Free Codes," Conference Record, IEEE International Conference on Communications, pp. 1633-1637, June, 1997, Montreal, Canada.