High performance parallelization scheme for the Hessenberg double shift QR algorithm

Parallel Computing

Volumn 25, Issue 6, 1999, Pages 729-744

  Suda, Reiji ^a   Nishida, Akira ^b   Oyanagi, Yoshio ^b  

^a NAGOYA UNIVERSITY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; EIGENVALUES AND EIGENFUNCTIONS; MATRIX ALGEBRA; PARALLEL ALGORITHMS; PIPELINE PROCESSING SYSTEMS;

COMMUNICATION LATENCY HIDING; DATA MAPPING; DOUBLE SHIFT QR ALGORITHM; SOFTWARE PIPELINING;

PARALLEL PROCESSING SYSTEMS;

EID: 0033138314     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-8191(99)00035-6     Document Type: Article

References (9)

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