1-Gb/s bidirectional I/O buffer using the current-mode scheme

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 4, 1999, Pages 529-535

  Sim, Jae Yoon ^a   Sohn, Young Soo ^a   Heo, Seung Chan ^a   Park, Hong June ^a   Cho, Soo In ^b  

^a Pohang University of Science and Technology (POSTECH)   (South Korea)

^b SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; IMPEDANCE MATCHING (ELECTRIC); TRANSCEIVERS;

BIDIRECTIONAL BUFFER CIRCUITS;

BUFFER CIRCUITS;

EID: 0033116585     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.753686     Document Type: Article

References (5)

1. K. Larn, L. R. Dennison, and W. J. Dally, "Simultaneous bidirectional signaling for IC systems," in Proc. ICCD, Oct. 1990, pp. 430-433.
2. R. Mooney, C. Dike, and S. Borkar, "A 900 Mb/s bidirectional signaling scheme," IEEE J. Solid-State Circuits, vol. 30, pp. 1538-1543, Dec. 1995.
3. T. Takahashi, M. Uchida, T. Takahashi, R. Yoshino, M. Yamamoto, and N. Kitamura, "A CMOS gate array with 600 Mb/s simultaneous bidirectional I/O circuits," IEEE J. Solid-State Circuits, vol. 30, pp. 1544-1546, Dec. 1995.
4. K. Lee, S. Kim, G. Ahn, and D. Jeong, "A CMOS serial link for fully duplexed data communications," IEEE J. Solid-State Circuits, vol. 30, pp. 353-364, Apr. 1995.
5. J.-Y. Sim, H.-J. Park, and S.-I. Cho, "1 Gb/s current-mode bidirectional I/O buffer," in 1997 Symp. VLSI Circuits Dig. Tech. Papers, June 1997, pp. 121-122.