Performance enhancement on microprocessors with hierarchical memory systems for solving large sparse linear systems

International Journal of High Performance Computing Applications

Volumn 13, Issue 1, 1999, Pages 63-79

  Wang, G ^a   Tafti, Danesh K ^a,b  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b National Center for Supercomputing Applications ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; HIERARCHICAL SYSTEMS; LINEAR SYSTEMS; PROBLEM SOLVING;

DOMAIN DECOMPOSITION METHODS; MICROPROCESSOR-BASED ARCHITECTURES;

MICROPROCESSOR CHIPS;

EID: 0033102047     PISSN: 10943420     EISSN: None     Source Type: Journal    
DOI: 10.1177/109434209901300104     Document Type: Article

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