Efficient VLSI architectures for columnsort

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 7, Issue 1, 1999, Pages 135-139

  Lin, Rong ^a   Olariu, Stephan ^b  

^a STATE UNIVERSITY OF NEW YORK   (United States)

^b Old Dominion University   (United States)

Author keywords

Digital signal processing; Parallel architectures; Reconfigurable architectures; Sorting circuits; VLSI design

Indexed keywords

COMPUTER SIMULATION; DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

SORTING CIRCUITS;

VLSI CIRCUITS;

EID: 0033098632     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.748211     Document Type: Article

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