Accelerating Viterbi decoder simulations

Electronic Engineering (London)

Volumn 71, Issue 866, 1999, Pages 69-76

  Hardin, Tom ^a   Gardner, Steve ^a  

^a Istari Design Inc

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BANDWIDTH; BIT ERROR RATE; COMPUTER SIMULATION; CONVOLUTIONAL CODES; ERROR ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; MODEMS; RANDOM ACCESS STORAGE; SIGNAL TO NOISE RATIO;

VITERBI DECODERS;

DECODING;

EID: 0033098392     PISSN: 00134902     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (5)

1. G Clark Jr and J Cain, "Error-Correction Coding For Digital Communications", Plenum Press, 1981.
2. JP Odenwalder, Error Control Coding Handbook (Final Report), Linkabit Corp, July 1976.
3. AJ Viterbi, "Convolutional Codes and Their Performance in Communication Systems," IEEE Transactions On Communication Technology", Vol. Com-19, No. 5, October 1971, pp751-771.
4. AJ Viterbi, "Error Bounds For Convolutional Codes and an Asymptotically Optimal Decoding Algorithm", IEEE Transactions on Information Theory, Vol. IT-13, April 1967, pp260-269.
5. Y Yasuda, K Kashiki, and Y Hirata, "High Rate Punctured Convolutional Codes for Soft Decision Viterbi Decoding", IEEE Transactions On Communications, Vol. Com-32, No. 3, March 1984, pp315-319.