Substrate optimization based on semi-analytical techniques

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 2, 1999, Pages 172-190

  Charbon, Edoardo ^a   Gharpurey, Ranjit ^a   Meyer, Robert G ^a   Sangiovanni Vincentelli, Alberto ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY ELEMENT METHOD; CONVERGENCE OF NUMERICAL METHODS; ELECTRIC NETWORK ANALYSIS; FAST FOURIER TRANSFORMS; GREEN'S FUNCTION; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; SENSITIVITY ANALYSIS; SPURIOUS SIGNAL NOISE; SUBSTRATES; SWITCHING CIRCUITS; TRANSIENTS;

LAYOUT REDESIGN; PHASE NOISE;

CMOS INTEGRATED CIRCUITS;

EID: 0033078939     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.743727     Document Type: Article

References (28)