On determining sensitization criterion in an iterative gate sizing process

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 2, 1999, Pages 231-238

  Lin, How Rern ^a   Hwang, Ting Ting ^a  

^a DA YEH UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; CONSTRAINT THEORY; ITERATIVE METHODS; OPTIMIZATION;

FUNCTION FALSE PATHS; PATH SENSITIZABILITY ANALYSIS; THRASHING COEFFICIENT;

COMPUTER AIDED LOGIC DESIGN;

EID: 0033078207     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.743742     Document Type: Article

References (11)