Out-of-order execution may not be cost-effective on processors featuring simultaneous multithreading

IEEE High-Performance Computer Architecture Symposium Proceedings

Volumn , Issue , 1999, Pages 64-67

  Hily, Sebastien ^a   Seznec, Andre ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; COMPUTER SELECTION AND EVALUATION; MULTIPROGRAMMING; PIPELINE PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

OUT-OF-ORDER EXECUTIONS; SIMULTANEOUS MULTITHREADING (SMT); SUPERSCALAR PROCESSORS;

COMPUTER ARCHITECTURE;

EID: 0032777340     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/hpca.1999.744331     Document Type: Conference Paper

References (9)