Low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1999, Pages

  Xu, G ^a   Embabi, S H K ^a   Hao, P ^a   Sanchez Sinencio, E ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; GAIN CONTROL; INTEGRATED CIRCUIT LAYOUT;

COMMON MODE FEEDBACK; NESTED CAPACITANCE COMPENSATION; POWER SUPPLY REJECTION RATIO;

OPERATIONAL AMPLIFIERS;

EID: 0032740612     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (5)