Logic verification of very large circuits using Shark

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1999, Pages 310-317

  Casas, Jeremy ^a   Yang, Hannah ^a   Khaira, Manpreet ^a   Joshi, Mandar ^a   Tetzlaff, Tom ^a   Otto, Steve ^a   Seligman, Erik ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SOFTWARE; LOGIC DESIGN; PARALLEL PROCESSING SYSTEMS;

SOFTWARE PACKAGE SHARK;

LOGIC CIRCUITS;

EID: 0032734553     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icvd.1999.745167     Document Type: Conference Paper

References (7)