Interconnect optimization strategies for high-performance VLSI designs

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1999, Pages 464-469

  Kahng, Andrew B ^a   Muddu, Sudhakar ^a   Sarto, Egino ^a  

^a HEWLETT PACKARD ENTERPRISE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; TUNING;

INTERCONNECT TUNING;

VLSI CIRCUITS;

EID: 0032732506     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icvd.1999.745199     Document Type: Conference Paper

References (16)