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Volumn , Issue , 1999, Pages 574-579
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Methodology for the verification of a `system on chip'
a a a a a a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT TESTING;
INTEGRATED SYSTEM ON A CHIP (ISOC);
INTEGRATED CIRCUIT LAYOUT;
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EID: 0032690816
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Article |
Times cited : (18)
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References (9)
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