Behavioral network graph unifying the domains of high-level and logic synthesis

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 213-218

  Bergamaschi, Reinaldo A ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DATA STRUCTURES; ELECTRIC NETWORK SYNTHESIS; MATHEMATICAL MODELS;

CONTROL/DATA FLOW GRAPHS (CDFG); HIGH-LEVEL LOGIC SYNTHESIS; REGISTER-TRANSFER-LEVEL (RTL) MODELS;

LOGIC CIRCUITS;

EID: 0032690801     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (12)