Analog implementation of pulse-coupled neural networks

IEEE Transactions on Neural Networks

Volumn 10, Issue 3, 1999, Pages 539-544

  Ota, Yasuhiro ^b   Wilamowski, Bogdan M ^a,b  

^a IEEE

^b UNIVERSITY OF WYOMING   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; ELECTRIC DELAY LINES; FAULT TOLERANT COMPUTER SYSTEMS; IMAGE CODING; IMAGE RECONSTRUCTION; VLSI CIRCUITS;

ANALOG CIRCUITRY; NEUROMORPHIC PULSE DELAY LINES; NEURON COUPLING STRENGTH; PULSE COUPLED NEURAL NETWORKS; THRESHOLD POINT;

NEURAL NETWORKS;

EID: 0032689578     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/72.761710     Document Type: Article

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