Effects of Flash EEPROM floating gate morphology on electrical behavior of fast programming bits

IEEE Transactions on Electron Devices

Volumn 46, Issue 7, 1999, Pages 1355-1362

  Nkansah, F D ^a,b   Hatalis, M ^a,b  

^a IEEE   (United States)

^b MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FLASH MEMORY;

CELLULAR ARRAYS; LOGIC GATES; THRESHOLD VOLTAGE;

PROM;

EID: 0032686527     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.772476     Document Type: Article

References (11)

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