Generation of very large circuits to benchmark the partitioning of FPGAs

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 1999, Pages 67-73

  Pistorius, Joachim ^a   Legai, Edmee ^a   Minoux, Michel ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMBINATORIAL CIRCUITS; COMPUTER WORKSTATIONS; ELECTRIC NETWORK ANALYSIS; UNIX;

BENCHMARK CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0032681932     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (20)