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Volumn , Issue , 1999, Pages 737-741
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Detecting false timing paths: Experiments on PowerPCTM microprocessors
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
CONSTRAINT THEORY;
ELECTRIC NETWORK SYNTHESIS;
MICROPROCESSOR CHIPS;
FALSE TIMING PATH DETECTION;
LATCH BOUNDARIES;
SYMBOLIC FUNCTIONS;
TIMING CIRCUITS;
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EID: 0032681051
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Article |
Times cited : (4)
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References (10)
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