Intermediate variable encodings that enable multiplexor-based implementations of two operand addition

Proceedings - Symposium on Computer Arithmetic

Volumn , Issue , 1999, Pages 22-29

  Phatak, Dhananjay S ^a   Koren, I ^a  

^a BINGHAMTON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN ALGEBRA; COMPUTER HARDWARE; DIGITAL ARITHMETIC; ENCODING (SYMBOLS); LOGIC GATES;

AND; CARRY PROPAGATION RECURSION; LOGARITHMIC DELAY; XOR;

CARRY LOGIC;

EID: 0032681048     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (13)