Thermal fatigue analysis of the flip-chip assembly on the polymer stud grid array (PSGA) package

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 1999, Pages 823-829

  Vandevelde, Bart ^a   Beyne, Eric ^a   Van Puymbroeck, Jef ^a   Heerman, Marcel ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FATIGUE OF MATERIALS; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; INTEGRATED CIRCUIT MANUFACTURE; MATHEMATICAL MODELS; OPTIMIZATION; RELIABILITY; SENSITIVITY ANALYSIS; SOLDERED JOINTS; THERMAL CYCLING; THERMOMECHANICAL TREATMENT;

DESIGN OF EXPERIMENTATION; INELASTIC STRAINS; POLYMER STUD GRID ARRAY PACKAGE; RESPONSE SURFACE MODELLING; THERMAL FATIGUE ANALYSIS;

ELECTRONICS PACKAGING;

EID: 0032680635     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (8)