Fabrication process of copper lead frame chip scale package (LF-CSP)

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 1999, Pages 1235-1240

  Moon, Jong Tae ^a   Hong, Sung Hak ^a   Yoon, Seung Wook ^a   Park, Chang Jun ^a   Choi, Yoon Hwa ^a   Kim, Jae Myun ^a   Lee, Jong Hyun ^a   Kim, Ja Ryoung ^a   Koh, Yo Hwan ^a  

^a Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ETCHING; FABRICATION; FLIP CHIP DEVICES; SCHEMATIC DIAGRAMS; SURFACE MOUNT TECHNOLOGY; THICKNESS MEASUREMENT;

COPPER LEAD FRAME CHIP SCALE PACKAGE; EPOXY MOLDING COMPOUND; THIN SMALL OUTLINE PACKAGE;

ELECTRONICS PACKAGING;

EID: 0032680622     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (7)