Buffer insertion for clock delay and skew minimization

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 1999, Pages 36-41

  Zeng, X ^a   Zhou, D ^a   Li, Wei ^a  

^a UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION;

BUFFER INSERTION TECHNIQUES; CLOCK SKEW/DELAY;

VLSI CIRCUITS;

EID: 0032669170     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/299996.300015     Document Type: Article

References (17)