Functional timing analysis for IP characterization

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 731-736

  Yalcin, Hakan ^a   Mortazavi, Mohammad ^a   Palermo, Robert ^a   Bamji, Cyrus ^a   Sakallah, Karem ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK SYNTHESIS; MATHEMATICAL MODELS; MODAL ANALYSIS;

FUNCTIONAL TIMING ANALYSIS;

TIMING CIRCUITS;

EID: 0032668916     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.310045     Document Type: Conference Paper

References (12)