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Volumn , Issue , 1999, Pages 355-359
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Hypergraph partitioning with fixed vertices
a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED DESIGN;
GRAPH THEORY;
HEURISTIC METHODS;
INTEGRATED CIRCUIT LAYOUT;
HYPERGRAPH PARTITIONING;
VLSI CIRCUITS;
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EID: 0032668905
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/309847.309957 Document Type: Conference Paper |
Times cited : (11)
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References (17)
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