Substrate modeling and lumped substrate resistance extraction for CMOS ESD/latchup circuit simulation

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 549-554

  Li, Tong ^a   Tsai, Ching Han ^a   Rosenbaum, Elyse ^a   Kang, Sung Mo ^a  

^a Silicon Perspective Corp   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC DISCHARGES; ELECTROSTATICS; MATHEMATICAL MODELS; OPTIMIZATION;

ELECTROSTATIC DISCHARGE (ESD); LATCHUP;

INTEGRATED CIRCUIT LAYOUT;

EID: 0032667914     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.309996     Document Type: Conference Paper

References (27)