Stack and queue layouts of directed acyclic graphs: Part I

SIAM Journal on Computing

Volumn 28, Issue 4, 1999, Pages 1510-1539

  Heath, Lenwood S ^a   Pemmaraju, Sriram V ^b   Trenk, Ann N ^c  

^a State University   (United States)

^b University of Iowa   (United States)

^c WELLESLEY COLLEGE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FAULT TOLERANT COMPUTER SYSTEMS; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS;

BOOK EMBEDDING; DIRECTED ACYCLIC GRAPH; FAULT TOLERANT COMPUTING; FORBIDDEN SUBGRAPH; GRAPH EMBEDDING; LINEAR TIME ALGORITHM; PARALLEL PROCESS SCHEDULING; QUEUE LAYOUT; STACK LAYOUT;

QUEUEING NETWORKS;

EID: 0032667449     PISSN: 00975397     EISSN: None     Source Type: Journal    
DOI: 10.1137/S0097539795280287     Document Type: Article

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