On the use of trace sampling for architectural studies of desktop applications

Performance Evaluation Review

Volumn 27, Issue 1, 1999, Pages 208-209

  Crowley, Patrick ^a   Baer, Jean Loup ^a  

^a University of Washington   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; PERSONAL COMPUTERS;

TRACE SAMPLING;

COMPUTER ARCHITECTURE;

EID: 0032666383     PISSN: 01635999     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/301464.301573     Document Type: Article

References (8)

1. P.J. Crowley and J-L Baer. On the use of trace sampling for architectural studies of desktop applications. Technical Report UW-CSE-98-12-05, University of Washington, 1998.
2. th Int. Symp. on Comp. Architecture.
3. R.E. Kessler, et al. A comparison of trace-sampling techniques for multi-megabyte caches. IEEE Trans. on Computers, 43(6):664-675, June 1994.
4. S. Laha, et al. Accurate low-cost methods for performance evaluation of cache memory systems. IEEE Trans. on Computers, 37(11):1325-1335, Nov. 1988.
5. th Int. Symp. on Comp. Architecture, June 1998.
6. Scott McFarling. Combining Branch Predictors. Technical Report TN 36, DEC-WRL, 1993.
7. D. A. Wood, et al. A model for estimating trace-sample miss ratios. In Proc. of ACM SIGMETRICS Conf. for the Measurement and Modeling of Comp. Systems, pp. 79-89, June 1991.
8. th Int. Symp. on Comp. Architecture, pp. 124-134, 1992.