New framework for automatic generation, insertion and verification of memory built-in self test units

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1999, Pages 391-396

  Zarrineh, Kamran ^a   Upadhyaya, Shambhu J ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AUTOMATIC TESTING; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DATA STORAGE EQUIPMENT; SYSTEMS ANALYSIS; USABILITY ENGINEERING;

MEMORY TEST ALGORITHM; MEMORY TEST SYNTHESIS;

BUILT-IN SELF TEST;

EID: 0032663590     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (10)