New procedures for identifying undetectable and redundant faults in synchronous sequential circuits

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1999, Pages 275-281

  Reddy, Sudhakar M ^a   Pomeranz, Irith ^a   Lin, Xijiang ^a   Basturkmen, Nadir Z ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SOFTWARE; FAULT TREE ANALYSIS; ITERATIVE METHODS; SEQUENTIAL CIRCUITS;

ITERATIVE LOGIC ARRAY; SYNCHRONOUS SEQUENTIAL CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 0032661187     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (10)