Capacitance-voltage measurement method for DMOS transistor channel length extraction

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 1999, Pages 135-140

  Olsson, J ^a   Valtonen, R ^a   Heinle, U ^a   Vestling, L ^a   Soderberg, A ^a   Norde, H ^a  

^a UPPSALA UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; COMPUTER SIMULATION; GATES (TRANSISTOR); VOLTAGE MEASUREMENT;

DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR (DMOS) TRANSISTORS;

MOSFET DEVICES;

EID: 0032654439     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (3)