Interlock avoidance in transparent and dynamic parallel program instrumentation using logical clocks

Parallel Computing

Volumn 25, Issue 5, 1999, Pages 569-591

  Cai, W ^a   Zhang, K ^b   Turner, S J ^c   Sun, C ^d  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b MACQUARIE UNIVERSITY   (Australia)

^c UNIVERSITY OF EXETER   (United Kingdom)

^d GRIFFITH UNIVERSITY   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMMUNICATION EQUIPMENT; LOGIC PROGRAMMING; TIMING CIRCUITS;

INTERLOCK AVOIDANCE; LOGICAL CLOCK APPROACH (LCA);

PARALLEL PROCESSING SYSTEMS;

EID: 0032652357     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-8191(99)00010-1     Document Type: Article

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