Power and signal integrity improvement in ultra high-speed current mode logic

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1999, Pages

  Ha, Hien ^a   Brewer, Forrest ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; LARGE SCALE SYSTEMS; LOGIC GATES; LSI CIRCUITS; PHASE LOCKED LOOPS;

LOW VOLTAGE SWING LOGIC; SIGNAL INTEGRITY;

EMITTER COUPLED LOGIC CIRCUITS;

EID: 0032645317     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (15)