Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1999, Pages

  Girard, P ^a   Guiller, L ^a   Landrault, C ^a   Pravossoudovitch, S ^a   Figueras, J ^a   Manich, S ^a   Teixeira, P ^a   Santos, M ^a  

^a LIRMM   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUILT-IN SELF TEST; COMBINATORIAL CIRCUITS; HEURISTIC METHODS; LOGIC DESIGN; POLYNOMIALS; SHIFT REGISTERS; SIMULATED ANNEALING;

LINEAR FEEDBACK SHIFT REGISTER; TEST PATTERN GENERATORS; WEIGHTED SWITCHING ACTIVITY;

INTEGRATED CIRCUIT TESTING;

EID: 0032644732     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (14)