Evaluation of error-control strategies for the linear symbolic analysis of analog integrated circuits

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 46, Issue 5, 1999, Pages 594-606

  Daems, Walter ^b   Verhaegen, Wim ^b   Wambacq, Piet ^b,c   Gielen, Georges ^b   Sansen, Willy ^a,b  

^a IEEE   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c CMOS Device Research Group   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION THEORY; BIPOLAR TRANSISTORS; CMOS INTEGRATED CIRCUITS; ERRORS; INTEGRATED CIRCUIT LAYOUT; LINEAR NETWORK ANALYSIS;

ANALOG DESIGN AUTOMATION; ANALOG INTEGRATED CIRCUITS; ERROR CONTROL; LINEAR SYMBOLIC EXPRESSIONS;

LINEAR INTEGRATED CIRCUITS;

EID: 0032639714     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.762925     Document Type: Article

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