Time-domain model for power dissipation of CMOS buffers driving lossy lines

Electronics Letters

Volumn 35, Issue 12, 1999, Pages 959-960

  Cappuccino, G ^a   Cocorullo, G ^a,b  

^a UNIVERSITY OF CALABRIA   (Italy)

^b CNR   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; COMPUTER SOFTWARE; ELECTRIC LINES; ELECTRIC LOSSES; MATHEMATICAL MODELS; VLSI CIRCUITS;

SOFTWARE PACKAGE HSPICE;

BUFFER CIRCUITS;

EID: 0032638670     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19990704     Document Type: Article

References (1)

1. ISMAIL, Y.I., FRIEDMAN, E.G., and NEVES, J.L.: 'Dynamic and short-circuit power of CMOS gates driving lossless transmission lines'. Great Lake Symp. VLSI '98, Lafayette, Louisiana, 1998