Evolutionary design of arithmetic circuits

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E82-A, Issue 5, 1999, Pages 798-805

  Aoki, Takafumi ^a   Homma, Naofumi ^a   Higuchi, Tatsuo ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

Arithmetic circuits; Circuit design; Computer arithmetic; Evolutionary computation; Evolvable hardware

Indexed keywords

DIGITAL ARITHMETIC; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MATHEMATICAL TRANSFORMATIONS;

ARITHMETIC CIRCUITS; COMPUTER ARITHMETIC; EVOLUTIONARY GRAPH GENERATION (EGG); EVOLVABLE HARDWARE;

LOGIC DESIGN;

EID: 0032637504     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (6)

1. J.F. Miller, P. Thomson, and T. Fogarty, "Designing electronic circuits using evolutionary algorithms. Arithmetic circuits: A case study," Genetic Algorithms and Evolution Strategies in Engineering and Computer Science, pp.105-131, Sept. 1997.
2. J.R. Koza, F.H. Bennett, III, D. Andre, M.A. Keane, and F. Dunlap, "Automated synthesis of analog electrical circuits by means of genetic programming," IEEE Trans. Evolutionary Computation, vol.1, no.2, pp.109-128, July 1997.
3. T. Higuchi, M. Murakawa, M. Iwata, I. Kajitani, L. Weixin, and M. Salami, "Evolvable hardware at function level," Proc. 1997 IEEE International Conference on Evolutionary Computation (ICEC '97), pp.187-192, 1997.
4. T. Aoki, II. Tokoyo, and T. Higuchi, "High-radix parallel dividers for VLSI signal processing," Proc. 1996 IEEE Workshop on VLSI Signal Processing, pp.83-92, Oct. 1996.
5. T. Aoki, H. Amada, and T. Higuchi, "Real/complex reconfigurable arithmetic using redundant complex number systems," Proc. 13th IEEE Symposium on Computer Arithmetic, pp.200-207, July 1997.
6. T. Aoki, H. Nogi, and T. Higuchi, "High-radix CORDIC algorithms for VLSI signal processing," Proc. 1997 IEEE Workshop on Signal Processing Systems, pp.183-192, Nov. 1997.