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Volumn 7, Issue 2, 1999, Pages 222-228

Hierarchical finite-state machines and their use for digital control

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL CONTROL SYSTEMS; FINITE AUTOMATA; HIERARCHICAL SYSTEMS; LOGIC DESIGN; RECURSIVE FUNCTIONS;

EID: 0032636941     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.766749     Document Type: Article
Times cited : (62)

References (11)
  • 3
    • 0031097394 scopus 로고    scopus 로고
    • Design of embedded systems: Formal models, validation and synthesis
    • Mar.
    • S. Edwards, L. Lavagno, E. A. Lee, and A. Sangiovanni-Vincentelli, "Design of embedded systems: Formal models, validation and synthesis," Proc. IEEE, vol. 85, pp. 366-390, Mar. 1997.
    • (1997) Proc. IEEE , vol.85 , pp. 366-390
    • Edwards, S.1    Lavagno, L.2    Lee, E.A.3    Sangiovanni-Vincentelli, A.4
  • 5
    • 33749733459 scopus 로고
    • Hierarchical graph-schemes
    • Latvian Academy of Science
    • V. Sklyarov "Hierarchical graph-schemes," Latvian Academy of Science, Automatics and Comput., no. 2, pp. 82-87, 1984.
    • (1984) Automatics and Comput. , Issue.2 , pp. 82-87
    • Sklyarov, V.1
  • 7
    • 33749753059 scopus 로고    scopus 로고
    • Sintese de unidades de controlo descritas por grafos dum esquema hierarquicos
    • V. Sklyarov, A. Adrego da Rocha, "Sintese de unidades de controlo descritas por grafos dum esquema hierarquicos," Electron. Telecomun., vol. 1, no. 6, pp. 577-588, 1996.
    • (1996) Electron. Telecomun. , vol.1 , Issue.6 , pp. 577-588
    • Sklyarov, V.1    Adrego Da Rocha, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.