MSB truncation scheme for low-power video processors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1999, Pages

  Moshnyaga, Vasily G ^a  

^a FUKUOKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DIGITAL SIGNAL PROCESSING; ENERGY UTILIZATION; IMAGE CODING; IMAGE QUALITY;

LOW-POWER VIDEO PROCESSORS; MOST SIGNIFICANT BITS (MSB) TRUNCATION METHODS;

MICROPROCESSOR CHIPS;

EID: 0032632545     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (9)