Topology-based method for identifying flip-flop graphs in BJT circuits

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 6, Issue , 1999, Pages

  Vargas Bernal, Rafael ^a   Sarmiento Reyes, Arturo ^a  

^a INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

DEAD NETWORKS; FLIP-FLOP GRAPHS;

GRAPH THEORY;

ELECTRIC NETWORK TOPOLOGY;

EID: 0032632504     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (6)

1. Sarmiento Reyes L. A., A partition method for the determination of multiple DC operating points, Ph.D. thesis, Delft University of Technology, May 1994.
2. Tetsuo Nishi, "On the number of solutions of a class of nonlinear resistive circuit," Proceedings of the IEEE International Symposium on Circuits and Systems, Singapore, pp. 766-769,1991.
3. Tetsuo Nishi and Leon O. Chua, "Uniqueness of solution for nonlinear resisitive circuits containing CCCS's or VCVS's whose controlling coefficients are finite," IEEE Transactions on Circuits and Systems, vol. CAS-33, no. 4, pp. 381-397, April 1986.
4. Lijljana Trajkovic and Alan N. Willson, Jr, "Theory of dc operating points of transistor networks," Archiv fur elektronik und Ubertrgungstechnik, vol. 46, no. 4, pp. 228-241,1992.
5. Andrsis Recski, Matmid Theory and its Applications in Network Theory and Statics, Springer-Verlag, 1989.
6. C. Chartrand and L.Lesniak, Graphs and digraphs, Chapman & Hall, 1996.