Abstract architecture representation using VSPEC

VLSI Design

Volumn 9, Issue 2, 1999, Pages 181-201

  Baraona, Phillip ^a,b   Alexander, Perry ^a,b,c  

^a University of Cincinnati   (United States)

^b UNIVERSITY OF CINCINNATI   (United States)

^c UNIVERSITY OF KANSAS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; FORMAL LOGIC; INTERFACES (COMPUTER);

VERILOG HARDWARE DESCRIPTION LANGUAGE (VHDL);

COMPUTER ARCHITECTURE;

EID: 0032628878     PISSN: 1065514X     EISSN: None     Source Type: None    
DOI: 10.1155/1999/95465     Document Type: Article

References (23)

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