2.5-V BiCMOS comparator with current-mode interpolation

IEEE Journal of Solid-State Circuits

Volumn 34, Issue 6, 1999, Pages 892-897

  Boni, Andrea ^a   Morandi, Carlo ^a   Padoan, Silvia ^a  

^a UNIVERSITY OF PARMA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ENERGY UTILIZATION; INTEGRATED CIRCUIT LAYOUT;

BICMOS COMPARATOR; CURRENT MODE INTERPOLATION; LOW POWER; LOW VOLTAGE;

COMPARATOR CIRCUITS;

EID: 0032628773     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.766825     Document Type: Article

References (14)

1. "The national technology roadmap for semiconductors." Semiconductor Industry Association, San Jose, CA, 1997.
2. Y. Yoshii, K. Asano, M. Nakamura, and C. Yamada, "An 8 bit, 100 Ms/s flash ADC," IEEE J. Solid-State Circuits, vol. SC-19, pp. 842-846, Dec. 1984.
3. P. J. Lim and B. A. Wooley, "An 8-bit 200-MHz BiCMOS comparator," IEEE J. Solid-State Circuits, vol. 25, pp. 192-198, Feb. 1990.
4. A. Boni and C. Morandi, "High-speed, low-power BiCMOS comparator using a pMOS variable load," IEEE J. Solid-State Circuits, vol. 33, pp. 143-146, Jan. 1998.
5. M. Inoue, H. Sadamatsu, A. Matsuzawa, A. Kanda, and T. Takemoto, "A monolithic 8-bit A/D converter with 120 MHz conversion rate," IEEE J. Solid-State Circuits, vol. SC-19, pp. 837-841, Dec. 1984.
6. B. Peetz, B. D. Hamilton, and J. Kan, "An 8-bit 250 megasample per second analog-to-digital converter: Operation without a sample and hold," IEEE J. Solid-State Circuits, vol. SC-21, pp. 997-1002, Dec. 1986.
7. C. W. Mangelsdorf, "A 400 MHz input flash converter with error correction," IEEE J. Solid-State Circuits, vol. 25, pp. 184-191, Feb. 1990.
8. B. Zojer, R. Petschacher, and W. A. Luschnig, "A 6-bit/200-MHz full A/D converter," IEEE Journal of Solid-State Circuits, vol. SC-20, pp. 780-786, June 1985.
9. W. T. Colleran and A. A. Abidi, "A 10-b, 75 MHz, two-stage pipelined bipolar A/D converter," IEEE J. Solid-State Circuits, vol. 28, pp. 1187-1199, Dec. 1993.
10. A. Boni and C. Morandi, "Harmonic distortion in high-speed differential A/D converters," IEEE Trans. Circuits Syst. II, vol. 45, pp. 403-406, Mar. 1998.
11. "0.8 μm BiCMOS process parameters document," Austria Mikro Systeme, Graz, Austria, 1995.
12. S. Padoan and A. Boni, "Modeling the effect of bias currents in the input adapter of high speed, low voltage differential ADC's," in Proc. IMEKO Workshop ADC Modeling and Testing, Sept. 1998, pp. 453-457.
13. B. Gilbert, "Current-mode circuits from a translinear view point: A tutorial," in Analog IC Design: The Current-Mode Approach, C. Tbumazou, F. J. Lidgey, and D. G. Haigh, Eds. London, U.K.: Inst. Elect. Eng. Press, 1993, pp. 265-267.
14. G. M. Yin, F. Op't Eynde, and W. Sansen, "A high-speed CMOS comparator with 8-bit resolution," IEEE J. Solid-State Circuits, vol. 27, pp. 208-211, Feb. 1992.